Job Description

Job Title: Senior Firmware Engineer(FTL)

Job Location: Rancho Cordova, CA

Essential Job Duties And Responsibilities:

Design and Maintain FTL Architecture

• Develop and maintain the Flash Translation Layer (FTL), including I/O flow, Garbage Collection, and Wear Leveling algorithms to ensure data integrity and maximize NAND endurance.

Block Management and Metadata Handling

• Implement bad block detection, isolation, and data migration mechanisms to manage block lifecycle.
• Design robust metadata structures to support fast mapping table reconstruction and system boot.

Error Handling Mechanisms

• Prevent and mitigate NAND-related issues such as read disturb, program/erase failures, and retention loss.
• Implement RAID encode/decode flows to guarantee data reliability.

Power-Loss Protection

• Design and implement power-loss protection algorithms to maintain data consistency and metadata integrity during unexpected shutdowns.
• Verify and optimize power-loss recovery flow to ensure fast and reliable system startup.

Performance and Resource Optimization

• Optimize channel/die/plane access scheduling and parallelism to improve throughput and reduce latency.
• Enhance DRAM/SRAM usage efficiency and reduce Write Amplification for better endurance and performance.

Debugging and Validation

• Develop and analyze FTL traces and logs for performance profiling and issue root-cause analysis.
• Conduct stress testing, mixed workload testing, power-fail tests, and corner-case verification to ensure firmware stability and reliability.
• Collaborate with Validation, Hardware, and ASIC teams to resolve cross-functional issues and ensure system robustness.

Minimum Requirements/Qualifications:

• Master s degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
• At least 3 years work experience in each of the following:
• Software/firmware applications engineering
• Experience in SSD controller/firmware architecture
• Strong experience in C/C++ programming and data structure
• Hands on experience with JTAG/ICE debuggers
• Experience with version control software like Git.
• Competent to work independently as well as in a small team collaboration environment.
• Must be willing to learn fast and execute as a team player.
• Good oral, written and presentation skills for communication and documentation.
• Ability to work independently with a minimum of day-to-day supervision .

Preferred Qualifications:

• The ability to operate logic analyzer, oscilloscope and bus protocol analyzer is valuable.
• Familiar with SATA/PCIe (NVMe) protocols
• Familiar with NAND flash protocols
• Linux system debug experience.
• Fluent in reading and writing Mandarin preferred .

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